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TDA6500TT; TDA6501TT 5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Product specification 2003 Jun 05
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
CONTENTS 1 2 3 4 5 6 7 8 9 FEATURES APPLICATIONS GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION LIMITING VALUES THERMAL CHARACTERISTICS 10 11 12 13 14 15 16 17 18
TDA6500TT; TDA6501TT
CHARACTERISTICS APPLICATION INFORMATION INTERNAL PIN CONFIGURATION PACKAGE OUTLINE SOLDERING DATA SHEET STATUS DEFINITIONS DISCLAIMERS PURCHASE OF PHILIPS I2C COMPONENTS
2003 Jun 05
2
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
1 FEATURES
TDA6500TT; TDA6501TT
* Single-chip 5 V mixer/oscillator and synthesizer for TV and VCR tuners * I2C-bus protocol compatible with 3.3 V and 5 V microcontrollers: - Address + 6 data bytes transmission - Address + 1 status byte (I2C-bus read mode) - Four independent I2C-bus addresses. * Two PMOS open-drain ports with 5 mA source capability to switch high band and FM sound trap (P2 and P3) * One PMOS open-drain port with 20 mA source capability to switch the mid band (P1) * One PMOS open-drain port with 10 mA source capability to switch the low band (P0) * Five step, 3-bit Analog-to-Digital Converter (ADC) and NPN open-collector general purpose port with 5 mA sinking capability (P6) * NPN open-collector general purpose port with 5 mA sinking capability (P4) * Internal AGC flag * In-lock flag * 33 V tuning voltage output * 15-bit programmable divider * Programmable reference divider ratio: 64, 80 or 128 * Programmable charge pump current: 60 or 280 A * Varicap drive disable * Balanced mixer with a common emitter input for the low band (single input) * Balanced mixer with a common base input for the mid and high bands (balanced input) * 2-pin asymmetrical oscillator for the low band * 2-pin asymmetrical oscillator for the mid band * 4-pin symmetrical oscillator for the high band * Frequency ranges: see Table 1 * IF preamplifier with asymmetrical 75 output impedance to drive a SAW filter (500 /40 pF) * Wide-band AGC detector for internal tuner AGC: - Five programmable take-over points - Two programmable time constants. 2 APPLICATIONS * TV and VCR tuners * Specially suited for switched concepts, all systems * Specially suited for strong off-air reception.
2003 Jun 05
3
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
3 GENERAL DESCRIPTION
TDA6500TT; TDA6501TT
The synthesizer consists of a 15-bit programmable divider, a crystal oscillator and its programmable reference divider and a phase/frequency detector combined with a charge pump, which drives the tuning amplifier including 33 V output. Depending on the reference divider ratio (64, 80 or 128) the phase comparator operates at 62.50 kHz, 50.00 kHz or 31.25 kHz with a 4 MHz crystal. The device can be controlled according to the I2C-bus format. The lock detector bit FL is set to logic 1 when the loop is locked. The AGC bit is set to logic 1 when the internal AGC is active (level below 3 V). These two flags are read on the SDA line (status byte) during a read operation (see Table 8). The ADC input is available on pin P6/ADC for digital AFC control. The ADC code is read during a read operation (see Table 8). In test mode, pin P6/ADC is used as a test output for 12fref and 12fdiv (see Table 5). A minimum of seven bytes, including address byte, is required to address the device, select the VCO frequency, program the ports, set the charge pump current, set the reference divider ratio, select the AGC take-over point and select the AGC time constant. The device has four independent I2C-bus addresses which can be selected by applying a specific voltage on input AS (see Table 4).
TDA6500TT and TDA6501TT are programmable 2-mixer, 3-oscillator and synthesizer MOPLL intended for pure 3-band tuner concepts (see Fig.1). The device includes two double balanced mixers for the low and mid/high bands and three oscillators for the low, mid and high bands respectively. The band limits for PAL tuners are shown in Table 1. Other functions are an IF amplifier, a wide-band AGC detector and a PLL synthesizer. Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling. Table 1 BAND MIN. Low Mid High 45.25 161.25 455.25 MAX. 154.25 439.25 855.25 MIN. 84.15 200.15 494.15 MAX. 193.15 478.15 894.15 Low, mid and high band limits RFpix INPUT (MHz) OSCILLATOR (MHz)
Bit P0 enables Port P0 and the low band mixer and oscillator. Bit P1 enables Port P1, the mid/high band mixer and the mid band oscillator. Bit P2 enables Port P2 and bit P3 enables Port P3. When P0 and P1 are disabled, the mid/high band mixer and the high band oscillator are enabled. The AGC detector provides information about the IF amplifier level. Five AGC take-over points are available by software. Two programmable AGC time constants are available for search tuning and normal tuner operation. 4 ORDERING INFORMATION
PACKAGE TYPE NUMBER NAME TDA6500TT TDA6501TT DESCRIPTION VERSION SOT487-1 TSSOP32 plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm
2003 Jun 05
4
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
5 BLOCK DIAGRAM
handbook, full pagewidth
TDA6500TT; TDA6501TT
VCC 10 (23) (8) 25 (6) 27 VCC (5) 28
AGC IFFIL1 IFFIL2
VSTAB STABILIZER
AL0, AL1, AL2 ATC
AGC DETECTOR
AGC
SAW DRIVER
(21) 12 (22) 11
IFOUT IFGND
LBIN RFGND
30 (3) 29 (4) RF INPUT LOW MIXER LOW LOW OSCILLATOR
(31) 2 (32) 1
LOSCOUT LOSCIN
P0 P0
(30) 3
OSCGND
(29) 4 MID OSCILLATOR MHBIN1 MHBIN2 31 (2) 32 (1) RF INPUT MID + HIGH MIXER MID + HIGH P1 (27) 6 (28) 5
MOSCOUT MOSCIN
HOSCIN1 (26) 7 HIGH OSCILLATOR (25) 8 (24) 9 HOSCOUT2 HOSCOUT1 HOSCIN2 P0 . P1
P1 + P0 . P1
XTAL
14 (19)
CRYSTAL OSCILLATOR
REFERENCE DIVIDER 64, 80, 128 RSA RSB
(17) 16 (18) 15
fref PHASE COMPARATOR fdiv T0, T1, T2 CP LOCK DETECTOR FL CHARGE PUMP Vref OS
CP VT
PLLGND
13 (20)
OPAMP
15-BIT PROGRAMMABLE DIVIDER
TDA6500TT (TDA6501TT)
15-BIT FREQUENCY REGISTER
CONTROL REGISTER
SCL SDA AS
20 (13) 19 (14) 21 (12) I2C-BUS TRANSCEIVER
1
CP
T2
T1
T0 RSA RSB OS
AUXILIARY REGISTER
STATUS REGISTER fref POR FL AGC 3-BIT ADC GATE T0, T1, T2 POWER ON RESET fdiv
ATC AL2 AL1 AL0
0
0
0
0
BAND SWITCH REGISTER P6 0 0 17 22 26 (16) (11) (7) 24 (9) 23 (10)
18 (15) P6/ADC
MCE149
P4
P3
P2
P1
P0
The pin numbers in parenthesis represent the TDA6501TT.
Fig.1 Block diagram.
2003 Jun 05
5
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
6 PINNING PIN SYMBOL TDA6500TT LOSCIN LOSCOUT OSCGND MOSCOUT MOSCIN HOSCIN1 HOSCOUT2 HOSCOUT1 HOSCIN2 VCC IFGND IFOUT PLLGND XTAL VT CP P4 P6/ADC SDA SCL AS P3 P0 P1 AGC P2 IFFIL1 IFFIL2 RFGND LBIN MHBIN1 MHBIN2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TDA6501TT 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
TDA6500TT; TDA6501TT
DESCRIPTION low band oscillator input low band oscillator output oscillator ground mid band oscillator output mid band oscillator input high band oscillator input high band oscillator output 2 high band oscillator output 1 high band oscillator input 2 supply voltage IF ground IF output digital ground crystal oscillator input tuning voltage output charge pump output NPN open-collector general purpose port NPN open-collector general purpose port or ADC input serial data input and output serial clock input address selection input PMOS open-drain general purpose port PMOS open-drain port to select low band operation PMOS open-drain port to select mid band operation AGC output PMOS open-drain general purpose port IF filter output 1 IF filter output 2 RF ground low band RF input mid and high band RF input 1 mid and high band RF input 2
2003 Jun 05
6
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, halfpage
LOSCIN LOSCOUT OSCGND MOSCOUT MOSCIN HOSCIN1 HOSCOUT2 HOSCOUT1 HOSCIN2
1 2 3 4 5 6 7 8
32 MHBIN2 31 MHBIN1 30 LBIN 29 RFGND 28 IFFIL2 27 IFFIL1 26 P2 25 AGC
handbook, halfpage
MHBIN2 MHBIN1 LBIN RFGND IFFIL2 IFFIL1 P2 AGC P1
1 2 3 4 5 6 7 8
32 LOSCIN 31 LOSCOUT 30 OSCGND 29 MOSCOUT 28 MOSCIN 27 HOSCIN1 26 HOSCOUT2 25 HOSCOUT1
TDA6500TT
9 24 P1 23 P0 22 P3 21 AS 20 SCL 19 SDA 18 P6/ADC 17 P4
FCE830
TDA6501TT
9 24 HOSCIN2 23 VCC 22 IFGND 21 IFOUT 20 PLLGND 19 XTAL 18 VT 17 CP
FCE906
VCC 10 IFGND 11 IFOUT 12 PLLGND 13 XTAL 14 VT 15 CP 16
P0 10 P3 11 AS 12 SCL 13 SDA 14 P6/ADC 15 P4 16
Fig.2 Pin configuration TDA6500TT.
Fig.3 Pin configuration TDA6501TT.
7
FUNCTIONAL DESCRIPTION
The device is controlled via the I2C-bus. For programming, a module address of 7 bits and the R/W bit for selecting the read or the write mode is required. 7.1 Write mode
Data bytes can be sent to the device after the address transmission (first byte). Seven data bytes are needed to fully program the device. The bus transceiver has an auto-increment facility, which permits the programming of the device within one single transmission (address + 6 data bytes). The device can also be partially programmed providing that the first data byte following the address is the first divider byte DB1 or the control byte CB. The data bytes are defined in Tables 2 and 3.
The first bit of the first data byte indicates whether frequency data (first bit = 0) or control, port and auxiliary data (first bit = 1) will follow. Until an I2C-bus STOP command is sent by the controller, additional data bytes can be entered without the need to re-address the device. The frequency register is loaded after the 8th clock pulse of the second divider byte DB2, the control register is loaded after the 8th clock pulse of the control byte CB, the band switch register is loaded after the 8th clock pulse of the band switch byte BB and the auxiliary register is loaded after the 8th clock pulse of the auxiliary byte AB. To program the AGC take-over point setting and the AGC current to a different value than the default value, an additional byte, the auxiliary byte, has to be sent. To this end, the auxiliary byte is preceded by a control byte with the test bits T2, T1 and T0 set to 011 (see Table 5).
2003 Jun 05
7
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 2 I2C-bus data format for write mode BIT NAME Address byte Divider byte 1 Divider byte 2 Control byte Band switch byte Auxiliary byte; note 1 Note BYTE MSB ADB DB1 DB2 CB BB AB 1 0 N7 1 0 ATC 1 N14 N6 CP P6 AL2 0 N13 N5 T2 0 AL1 0 N12 N4 T1 P4 AL0 0 N11 N3 T0 P3 0
TDA6500TT; TDA6501TT
ACK LSB MA1 N10 N2 RSA P2 0 MA0 N9 N1 RSB P1 0 R/W = 0 N8 N0 OS P0 0 A A A A A A
1. Auxiliary byte AB replaces band switch byte BB when bits T2, T1 and T0 = 011. Table 3 Description of bits shown in Table 2 SYMBOL A MA1 and MA0 R/W N14 to N0 CP acknowledge programmable address bits; see Table 4 logic 0 for write mode programmable divider bits; N = (N14 x 214) + (N13 x 213) + ... + (N1 x 21) + N0 charge pump current CP = 0, the charge pump current is 60 A CP = 1, the charge pump current is 280 A (default) T2, T1 and T0 RSA and RSB OS test bits; see Table 5 reference divider ratio select bits; see Table 6 tuning amplifier control bit OS = 0, normal operation; tuning voltage is on OS = 1, tuning voltage is off; high-impedance state (default) P6 and P4 NPN port control bits Pn = 0, port n is off; high-impedance state (default) Pn = 1, buffer n is on; VO = VCE(sat) P3 to P0 PMOS port control bits 0 = port n is off; high-impedance state (default) 1 = buffer n is on; VO = VCC - VDS(sat) ATC AGC time constant ATC = 0, IAGC = 220 nA; t = 2 s with C = 160 nF (default) ATC = 1, IAGC = 9 A; t = 50 ms with C = 160 nF AL2, AL1 and AL0 AGC take-over point bits; see Table 7 DESCRIPTION
2003 Jun 05
8
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having up to 4 synthesizers in one system by applying a specific voltage on the AS input. Table 4 gives the relationship between the input voltage applied to the AS input and bits MA1 and MA0. Table 4 I2C-bus address selection VOLTAGE APPLIED TO PIN AS 0 V to 0.1VCC open or 0.2VCC to 0.3VCC 0.4VCC to 0.6VCC 0.9VCC to VCC Table 5 T2 0 0 0 0 1 1 1 1 Notes 1. This is the default mode at Power-on reset. 2. The ADC input cannot be used when these test modes are active; see Section 7.2 for more information Table 6 Reference divider ratio select RSB 0 1 1 0 80 128 64 forbidden REFERENCE DIVIDER RATIO Test modes T1 0 0 1 1 1 1 0 0 T0 0 1 0 1 0 1 0 1 normal mode normal mode; note 1 charge pump is off control byte is followed by auxiliary byte AB in stead of the band switch byte BB charge pump is sinking current charge pump is sourcing current
1/ 1/ 2fref
MA1 0 0 1 1
MA0 0 1 0 1
TEST MODES
is available on pin P6/ADC; note 2
2fdiv is available on pin P6/ADC; note 2
RSA 0 0 1 1
2003 Jun 05
9
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 7 AL2 0 0 0 0 1 1 1 1 Notes AGC take-over point AL1 0 0 1 1 0 0 1 1 AL0 0 1 0 1 0 1 0 1 115 dBV 115 dBV
TDA6500TT; TDA6501TT
ASYMMETRICAL MODE
112 dBV; default mode at Power-on reset 109 dBV 106 dBV 103 dBV IAGC = 0; external AGC; note 1 3.5 V; disabled; note 2
1. The AGC detector is disabled. Both the sinking and sourcing currents from the IC are disabled. The AGC output goes into a high-impedance state and an external AGC source can be connected in parallel. 2. The AGC detector is disabled and the fast mode current source is enabled. 7.2 Read mode The POR flag is set to logic 1 at Power-on. The flag is reset when an end-of-data is detected by the device (end of a read sequence). Control of the loop is made possible with the in-lock flag (FL) which indicates when the loop is locked (FL = 1). The internal AGC status is available from the AGC bit. AGC = 1 indicates when the selected take-over point is reached. A built-in ADC is available on the P6/ADC pin. The ADC can be used to apply AFC information to the microcontroller from the IF section of the tuner. The relationship between the voltage applied to the ADC input and the A2, A1 and A0 bits is given in Table 10.
Data can be read from the device by setting the R/W bit to logic 1. The data read format is shown in Table 8. After the slave address has been recognized, the device generates an acknowledge pulse and the first data byte (status byte) is transferred on the SDA line with the MSB first. Data is valid on the SDA line during a HIGH-level of the SCL clock signal. A second data byte can be read from the device if the microcontroller generates an acknowledge on the SDA line (master acknowledge). End of transmission will occur if no master acknowledge occurs. The device will then release the data line to allow the microcontroller to generate a STOP condition. Table 8 Read data format
BIT NAME Address byte Status byte Note 1. MSB is transmitted first. BYTE ADB SB MSB(1) 1 POR 1 FL 0 1 0 1 0 AGC MA1 A2 MA0 A1 ACK LSB R/W = 1 A0 A -
2003 Jun 05
10
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 9 Description of bits shown in Table 8
TDA6500TT; TDA6501TT
SYMBOL A MA1 and MA0 R/W POR acknowledge
DESCRIPTION programmable address bits; see Table 4 logic 1 for read mode Power-on reset flag POR = 0, normal operation POR = 1, power-on state
FL
in-lock flag FL = 0, not locked FL = 1, the PLL is locked
AGC
internal AGC flag AGC = 0, internal AGC not active AGC = 1, internal AGC is active; level below 3 V
A2, A1 and A0 Table 10 ADC levels
digital output of the 5-level ADC; see Table 10
VOLTAGE APPLIED TO ADC INPUT(1) 0.60VCC to VCC 0.45VCC to 0.60VCC 0.30VCC to 0.45VCC 0.15VCC to 0.30VCC 0 to 0.15VCC Note 1. Accuracy is 0.03VCC. 7.3 Power-on reset
A2 1 0 0 0 0
A1 0 1 1 0 0
A0 0 1 0 1 0
The Power-on detection threshold voltage (VPOR) is set to VCC = 3.5 V at room temperature. Below this threshold, the device is reset to the Power-on state. In the Power-on state, the charge pump current is set to 280 A, the tuning voltage output is disabled, the test bits T2, T1 and T0 are set to 001, the AGC take-over point is set to 112 dBV and the AGC current is set to the slow mode. The high band is selected by default. Table 11 Default bits at Power-on reset BIT NAME Address byte Divider byte 1 Divider byte 2 Control byte Band switch byte Auxiliary byte 2003 Jun 05 BYTE MSB ADB DB1 DB2 CB BB AB 1 0 X 1 - 0 1 X X 1 0 0 0 X X 0 - 1 11 0 X X 0 0 0 0 X X 1 0 - MA1 X X X 0 - MA0 X X X 0 - LSB X X X 1 0 -
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
8 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); note 1. SYMBOL VCC VXTAL VP6/ADC IP6/ADC VVT VCP VP4 IP4 VSDA ISDA VSCL VAS VPn IP1 IP0 IP2, IP3 Tstg Tamb Tj Note 1. Maximum ratings cannot be exceeded, not even momentarily without causing irreversible IC damage. Maximum ratings cannot be accumulated. 9 THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT supply voltage crystal input voltage NPN port input and output voltage NPN port output current (open-collector) tuning voltage output charge pump output voltage NPN port output voltage (open-collector) NPN port output current (open-collector) serial data input/output voltage serial data output current serial clock input voltage address selection input voltage PMOS port output voltage (open-drain) PMOS port output current (open-drain) PMOS port output current (open-drain) PMOS port output current (open-drain) storage temperature ambient temperature junction temperature PARAMETER MIN. -0.3 -0.3 -0.3 0 -0.3 -0.3 -0.3 0 -0.3 -1 -0.3 -0.3 -0.3 -25 -15 -10 -40 -20 - +6 VCC + 0.3 VCC + 0.3 +10 +35 VCC + 0.3 VCC + 0.3 +10 +6 +10 +6 VCC + 0.3 VCC + 0.3 0 0 0 +150 +85 150 MAX. UNIT V V V mA V V V mA V mA V V V mA mA mA C C C
SOT487EC3 package (TDA6500TT) Rth(j-a) thermal resistance from junction to ambient in free air; one layer PCB, JEDEC standards; note 1 110 K/W
SOT487EC5 package (TDA6501TT) Rth(j-a) Note 1. The thermal resistance is highly dependant on the PCB on which the package is mounted. The thermal resistance values are given only for customer's guidance. thermal resistance from junction to ambient in free air; one layer PCB, JEDEC standards; note 1 115 K/W
2003 Jun 05
12
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
10 CHARACTERISTICS VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Fig.16 for the PAL standard); unless otherwise specified. SYMBOL Supply VCC ICC supply voltage supply current VCC = 5 V PNP ports off two PNP ports on; one port sourcing 20 mA; one other port sourcing 5 mA PLL part FUNCTIONAL RANGE VPOR N fXTAL ZXTAL Power-on reset supply voltage divider ratio crystal oscillator input impedance (absolute value) for a voltage lower than VPOR, Power-on reset is active 15-bit frequency word RXTAL = 25 to 300 fXTAL = 4 MHz 1.5 64 3.2 600 3.5 - 4.0 1200 - 32767 4.48 - MHz V - - 74 96 102 94 116 122 mA mA mA one PNP port on; sourcing 20 mA - 4.5 5.0 5.5 V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
PMOS PORTS: P0, P1, P2 AND P3 ILO VDS(P0)(sat) VDS(P1)(sat) VDS(P2)(sat), VDS(P3)(sat) ILO VCE(sat) ADC INPUT VI IIH IIL IIH IIL ADC input voltage HIGH-level input current LOW-level input current see Table 10 ADC input Vi = VCC ADC input Vi = 0 V AS input Vi = VCC AS input Vi = 0 V 0 - -10 - -10 - - - - - VCC 10 - 10 - V A A A A output leakage current output saturation voltage output saturation voltage output saturation voltage VCC = 5.5 V; VPn = 0 V - - 0.25 0.25 0.25 10 0.4 0.4 0.4 A V V V buffer P0 only is on; sourcing 10 mA - buffer P1 only is on; sourcing 20 mA - buffer P2 or P3 is on; sourcing 5 mA -
NPN PORTS: P4 AND P6 output leakage current output saturation voltage VCC = 5.5 V; VPn = 6 V buffer P4 or P6 is on; sinking 5 mA - - - 0.25 10 0.4 A V
AS INPUT (ADDRESS SELECTION) HIGH-level input current LOW-level input current
2003 Jun 05
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Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
SYMBOL PARAMETER CONDITIONS
TDA6500TT; TDA6501TT
MIN. - - - - - - - - -
TYP.
MAX.
UNIT
SCL AND SDA INPUTS VIL VIH IIH IIL SDA OUTPUT ILO Vo fclk IIH IIL ILO(off) ILO(off) Vo leakage current output voltage SDA output Vo = 5.5 V sink current = 3 mA - - - CP = 1 CP = 0 T2 = 0; T1 = 1; T0 = 0 - - -15 - 0.2 10 0.4 A V LOW-level input voltage HIGH-level input voltage HIGH-level input current LOW-level input current VBUS = 5.5 V; VCC = 0 V VBUS = 5.5 V; VCC = 5.5 V VBUS = 1.5 V; VCC = 0 V VBUS = 0 V; VCC = 5.5 V 0 2.3 - - - -10 1.5 5.5 10 10 10 - V V A A A A
CLOCK FREQUENCY clock frequency 400 - - +15 kHz A A nA A V
CHARGE PUMP OUTPUT CP HIGH-level input current (absolute value) LOW-level input current (absolute value) off-state leakage current 280 60 0 - -
TUNING VOLTAGE OUTPUT VT off-state leakage current output voltage when the loop is closed OS = 1; tuning supply = 33 V OS = 0; T2 = 0; T1 = 0; T0 = 1; RL = 27 k; tuning supply = 33 V 10 32.7
Mixer/oscillator part LOW BAND MIXER MODE (P0 = 1 AND P1 = 0); INCLUDING IF AMPLIFIER fRF Gv NF Vo RF frequency voltage gain noise figure output voltage causing 0.3% cross modulation in channel output voltage causing 1.1 kHz incidental FM channel SO2 beat input level without lock-out optimum source conductance for noise figure input conductance picture carrier; note 1 fRF = 44.25 MHz; see Fig.7 fRF = 157 MHz; see Fig.7 fRF = 50 MHz; see Figs 8 and 9 fRF = 44.25 MHz; see Fig.10 fRF = 157 MHz; see Fig.10 fRF = 44.25 MHz; note 2 fRF = 157 MHz; note 2 VRFpix = 115 dBV at IF output; note 3 see Fig.14; note 13 fRF = 50 MHz fRF = 150 MHz fRF = 44.25 MHz; see Fig.4 fRF = 161.25 MHz; see Fig.4 2003 Jun 05 14 44.25 25.0 25.0 - 108 108 108 108 57 - - - - - - 27.5 27.5 8.0 111 111 111 111 60 - 0.7 0.9 0.30 0.33 154.25 30 30 10.0 - - - - - 120 - - - - MHz dB dB dB dBV dBV dBV dBV dBc dBV mS mS mS mS
Vo INTSO2 Vi gos
gi
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
SYMBOL Ci PARAMETER input capacitance CONDITIONS fRF = 44.25 to 161.25 MHz; see Fig.4
TDA6500TT; TDA6501TT
MIN. -
TYP. 1.29
MAX. -
UNIT pF
HIGH BAND MIXER IN MID BAND MODE (P0 = 0 AND P1 = 1); INCLUDING IF AMPLIFIER fRF Gv NF Vo RF frequency voltage gain noise figure (not corrected for image) output voltage causing 0.3% cross modulation in channel output voltage causing 1.1 kHz incidental FM (N + 5) - 1 MHz pulling picture carrier; note 1 fRF = 157 MHz; see Fig.11 fRF = 443 MHz; see Fig.11 fRF = 157MHz; see Fig.12 fRF = 443 MHz; see Fig.12 fRF = 157 MHz; see Fig.13 fRF = 443 MHz; see Fig.13 fRF = 157 MHz; note 2 fRF = 443 MHz; note 2 fRFwanted = 443 MHz; fosc = 481.9 MHz; fRFunwanted = 482 MHz; note 8 RS at fRF = 157 MHz; see Fig.5 RS at fRF = 443 MHz; see Fig.5 LS at fRF = 157 MHz; see Fig.5 LS at fRF = 443 MHz; see Fig.5 Vi fRF Gv NF Vo input level without lock-out see Fig.15; note 13 HIGH BAND MIXER IN HIGH BAND MODE (P0 = 0 AND P1 = 0); INCLUDING IF AMPLIFIER RF frequency voltage gain noise figure (not corrected for image) output voltage causing 0.3% cross modulation in channel output voltage causing 1.1 kHz incidental FM (N + 5) - 1 MHz pulling picture carrier; note 1 fRF = 443 MHz; see Fig.11 fRF = 863.25 MHz; see Fig.11 fRF = 443 MHz; see Fig.12 fRF = 863.25 MHz; see Fig.12 fRF = 443 MHz; see Fig.13 fRF = 863.25 MHz; see Fig.13 fRF = 443 MHz; note 2 fRF = 863.25 MHz; note 2 fRFwanted = 863.25 MHz; fosc = 902.15 MHz; fRFunwanted = 902.25 MHz; note 8 RS at fRF = 443 MHz; see Fig.5 RS at fRF = 863.25 MHz; see Fig.5 LS at fRF = 443 MHz; see Fig.5 LS at fRF = 863.25 MHz; see Fig.5 Vi input level without lock-out see Fig.15; note 13 455.25 35 35 - - 108 108 108 108 72 - 38 38 6.0 7.0 111 111 111 111 80 855.25 41 41 8.0 9.0 - - - - - MHz dB dB dB dB dBV dBV dBV dBV dBV 161.25 35 35 - - 108 108 108 108 72 - 38 38 6 6 111 111 111 111 80 439.25 41 41 8.0 8.0 - - - - - MHz dB dB dB dB dBV dBV dBV dBV dBV
Vo Vf(N+5)-1
Zi
input impedance (RS + jLS)
- - - - -
25 25 13 13 -
- - - - 120
nH nH dBV
Vo Vf(N+5)-1
Zi
input impedance (RS + jLS)
- - - - -
25 23 13 13 -
- - - - 120
nH nH dBV
2003 Jun 05
15
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
SYMBOL PARAMETER CONDITIONS
TDA6500TT; TDA6501TT
MIN. -
TYP.
MAX.
UNIT
LOW BAND OSCILLATOR (see Fig.16) fosc fosc(V) fosc(T) fosc(t) osc oscillator frequency oscillator frequency shift with supply voltage oscillator frequency drift with temperature oscillator frequency switch-on drift phase noise, carrier to noise sideband note 4 VCC = 5%; note 5 VCC = 10%; note 5 T = 25 C; VCC = 5 V with compensation; note 6 5 s to 15 min after switching on VCC = 5 V; note 7 10 kHz frequency offset; worst case in the frequency range 100 kHz frequency offset; worst case in the frequency range RSCp-p ripple susceptibility of VCC (peak-to-peak value) 4.75 < VCC < 5.25 V; worst case in the frequency range; ripple frequency 500 kHz; note 9 84.15 - - - - 84 104 15 193.15 70 - 1100 700 - - - MHz kHz kHz kHz kHz dBc/Hz dBc/Hz mV 20 110 800 500 87 107 20
MID BAND OSCILLATOR (see Fig.16) fosc fosc(V) fosc(T) fosc(t) osc oscillator frequency oscillator frequency shift with supply voltage oscillator frequency drift with temperature oscillator frequency drift after switch on phase noise, carrier to noise sideband note 4 VCC = 5%; note 5 VCC = 10%; note 5 T = 25 C; VCC = 5 V with compensation; note 6 5 s to 15 min after switching on VCC = 5 V; note 7 10 kHz frequency offset; worst case in the frequency range 100 kHz frequency offset; worst case in the frequency range RSCp-p ripple susceptibility of VCC (peak-to-peak value) 4.75 < VCC < 5.25 V; worst case in the frequency range; ripple frequency 500 kHz; note 9 200.15 - - - - 84 104 15 - 20 110 1000 500 87 107 20 478.15 70 - 1500 700 - - - MHz kHz kHz kHz kHz dBc/Hz dBc/Hz mV
HIGH BAND OSCILLATOR (see Fig.16) fosc fosc(V) fosc(T) fosc(t) osc oscillator frequency oscillator frequency shift with supply voltage oscillator frequency drift with temperature oscillator frequency drift after switch on phase noise, carrier to noise sideband note 4 VCC = 5%; note 5 VCC = 10%; note 5 T = 25 C VCC = 5 V; with compensation; note 6 5 s to 15 min after switching on; VCC = 5 V; note 7 10 kHz frequency offset; worst case in the frequency range 100 kHz frequency offset; worst case in the frequency range 494.15 - - - - 84 104 - 20 300 1100 600 87 107 894.15 70 - 1500 900 - - MHz kHz kHz kHz kHz dBc/Hz dBc/Hz
2003 Jun 05
16
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
SYMBOL RSCp-p PARAMETER ripple susceptibility of VCC (peak-to-peak value) CONDITIONS
TDA6500TT; TDA6501TT
MIN. 15
TYP. 20
MAX. -
UNIT mV
4.75 < VCC < 5.25 V; worst case in the frequency range; ripple frequency 500 kHz; note 9
IF AMPLIFIER S22 Zo output reflection coefficient output impedance (RS + jLS) magnitude; see Fig.6 phase; see Fig.6 RS at 36.15 MHz; see Fig.6 CS at 36.15 MHz; see Fig.6 RS at 43.5 MHz; see Fig.6 CS at 43.5 MHz; see Fig.6 REJECTION AT THE IF OUTPUT INTdiv INTXTAL INTfref AGC OUTPUT AGCTOP Isource(fast) Isource(slow) Isink(peak) Vmax Vmin VRF(slip) AGC take-over point source current 1 source current 2 peak sink current to ground AGC maximum output voltage AGC minimum output voltage RF voltage range to switch the AGC from active to not active mode AGC output voltage AGC output voltage AGC leakage current AGC output voltage with AGC disabled AGC bit = 1 or AGC active AGC bit = 0 or AGC not active AL2 = 1; AL1 = 1; AL0 = 0; 0 < VAGC < VCC AL2 = 1; AL1 = 1; AL0 = 1 AL2 = 0; AL1 = 1; AL0 = 0 110.5 8.0 210.0 80 3.45 0 - 112 9.5 245.0 100 3.5 - - 113.5 11.0 280.0 120 3.6 0.1 0.5 dBV A nA A V V dB level of divider interferences note 10; worst case in the IF signal crystal oscillator interferences rejection reference frequency rejection VIF = 100 dBV; worst case in the frequency range; note 11 VIF = 100 dBV; worst case in the frequency range; note 12 - 60 60 - 66 66 23 - - dBV dBc dBc - - - - - - 38 0.36 79 9 80 3 - - - - - - dB deg nF nF
VRM(L) VRM(H) ILO VO(off) Notes
0 3 -50 3.45
- 3.5 - 3.5
2.9 3.6 +50 3.6
V V nA V
1. The RF frequency range is defined by the oscillator frequency range and the Intermediate Frequency (IF). 2. This is the level of the RF unwanted signal, 50% amplitude modulated with 1 kHz, that causes a 1.1 kHz FM modulation of the local oscillator and thus of the wanted signal; Vwanted = 100 dBV; funwanted = fwanted + 5.5 MHz. The FM modulation is measured at the oscillator output with a peeking coil using a modulation analyser with a peak to peak detector and a post detection filter of 300 Hz up to 3 kHz. 3. Channel SO2 beat is the interfering product of fRFpix, fIF and fosc of channel SO2; fbeat = 37.35 MHz. The possible mechanisms are: fosc - 2 x fIF or 2 x fRFpix - fosc. For the measurement Vo(IFOUT) = VRFpix = 115 dBV. 2003 Jun 05 17
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
4. Limits are related to the tank circuits used in Fig.16 for a PAL application. The choice of different external components adapts the measurement circuit to other frequency bands or NTSC applications. 5. The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement. 6. The frequency drift is defined as a change in oscillator frequency when the ambient temperature varies from Tamb = 25 to 50 C or from Tamb = 25 to 0 C. The oscillator is free running during this measurement. 7. Switch-on drift is defined as the change in oscillator frequency between 5 s and 15 min after switch on. The oscillator is free running during this measurement. 8. (N + 5) - 1 MHz pulling is the input level of channel N + 5, at frequency 1 MHz lower, causing FM sidebands 30 dB below the wanted carrier. 9. The supply ripple susceptibility is measured in the circuit according to Fig.16 using a spectrum analyser connected to the IF output. An unmodulated RF signal is applied to the test board RF input. A sinewave signal with a frequency of 500 kHz is superimposed onto the supply voltage. The amplitude of this ripple signal is adjusted to bring the 500 kHz sidebands around the IF carrier to a level of -53.5 dB with respect to the carrier. 10. This is the level of divider interferences close to the IF. For example channel S3: fosc = 158.15 MHz, 1 f 4 osc = 39.5375 MHz. The LOSCIN input must be left open (i.e. not connected to any load or cable); the HOSCIN1 and HOSCIN2 inputs are connected to a hybrid. 11. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be greater than 60 dB for an IF output signal of 100 dBV. 12. The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to the carrier. The rejection has to be greater than 60 dB for an IF output signal of 100 dBV. 13. The IF output signal stays stable within the range of the fref step for a low level RF input up to 120 dBV. This should be verified for every channel in the band.
handbook, full pagewidth
1 2 0.5
5 10
0.2
-j 10 5 2 1 0.5 0.2 40 MHz 0 +j
10
140 MHz 5 0.2
2 1
0.5
MCE150
Fig.4 Input admittance (S11) of the low band mixer (40 to 140 MHz); Yo = 20 mS.
2003 Jun 05
18
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
1 0.5 2 870 MHz 0.2 5 10 0 -j 10 0.2 5 160 MHz 0.2 0.5 1 2 5 10
+j
0.5 1
2
MCE151
Fig.5 Input impedance (S11) of the mid and high band mixer(160 to 870 MHz); Zo = 100 .
handbook, full pagewidth
1 0.5 2
0.2
5 10
+j 0 -j 0.2 0.5 1 50 MHz 2 30 MHz 5 10
10
0.2
5
0.5 1
2
MCE152
Fig.6 Output impedance (S22) of the IF amplifier (30 to 50 MHz); Zo = 50 .
2003 Jun 05
19
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
50
signal source LBIN IFOUT
L spectrum analyzer Vo C V'meas 50
e
Vmeas V
50
Vi
D.U.T.
RMS voltmeter
FCE213
Zi >> 50 Vi = 2 x Vmeas = 80 dBV. Vi = Vmeas + 6 dB = 80 dBV. 50 Vo = V'meas x -------------------------------- = V'meas + attenuation. 2 22 50 + L Vo Gv = 20 log ----- . Vi PAL: IF = 38.9 MHz. L = 680 nH. C = 25.9 pF. attenuation = 10.2 dB.
Fig.7 Gain (GV) measurement in low band.
handbook, full pagewidth
I1 C1
PCB BNC C3
I3
PCB
BNC
L1
C2
plug RIM-RIM
I2
plug RIM-RIM
C4
(a)
(b)
MBE286
For fRF = 50 MHz. Low band mixer frequency response measured = 57 MHz; loss = 0 dB; image suppression = 16 dB. C1 = 9 pF. C2 = 15 pF. L1 = 7 turns ( 5.5 mm, wire = 0.5 mm). l1 = semi rigid cable (RIM): 5 cm long; 33 dB/100 m; 50 ; 96 pF/m.
For fRF = 150 MHz. Low band mixer frequency response measured = 150.3 MHz; loss = 1.3 dB; image suppression = 13 dB. C3 = 5 pF. C4 = 25 pF. l2 = semi rigid cable (RIM): 30 cm long; 33 dB/100 m; 50 ; 96 pF/m. l3 = semi rigid cable (RIM): 5 cm long; 33 dB/100 m; 50 ; 96 pF/m.
Fig.8 Input circuit for optimum noise figure in the low band.
2003 Jun 05
20
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
NOISE SOURCE
L BNC RIM LBIN IFOUT
NOISE FIGURE METER
FCE214
INPUT CIRCUIT
D.U.T.
C
NF = NFmeas - loss of input circuit.
PAL: IF = 38.9 MHz. L = 680 nH. C = 25.9 pF.
Fig.9 Noise figure (NF) measurement in low band.
handbook, full pagewidth
FILTER AM = 30% 2 kHz unwanted signal source L A C LBIN IFOUT 18 dB attenuator modulation analyzer
50 eu
HYBRID
D.U.T.
38.9 MHz (PAL & OFDM) Vo C Vmeas V 50
50 ew wanted signal source B D 50
RMS voltmeter
FCE827
50 Vo = Vmeas x -------------------------------- = Vmeas + attenuation. 2 22 50 + L Wanted output signal at fRFpix; Vo = 100 dBV. Unwanted output signal at fRFpix + 5.5 MHz. The level of unwanted signal is measured by causing 0.09% AM modulation in the wanted signal.
PAL: IF = 38.9 MHz. L = 680 nH. C = 25.9 pF. attenuation = 10.2 dB.
Fig.10 Cross modulation measurement in low band.
2003 Jun 05
21
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
50
signal source A C MHBIN1 IFOUT
L spectrum analyzer C Vo V'meas 50
e
Vmeas V
50
Vi
HYBRID
D.U.T.
MHBIN2
B RMS voltmeter 50
D
FCE216
Loss in hybrid = 1 dB. Vi = Vmeas - Ioss = 70 dBV. 50 Vo = V'meas x -------------------------------- = V'meas + attenuation. 2 22 50 + L Vo Gv = 20 log ----- . Vi PAL: IF = 38.9 MHz. L = 680 nH. C = 25.9 pF. attenuation = 10.2 dB.
Fig.11 Gain (GV) measurement in mid and high bands.
handbook, full pagewidth
NOISE SOURCE
L A C MHBIN1 IFOUT
NOISE FIGURE METER
FCE217
HYBRID
D.U.T.
MHBIN2
C
B 50
D
PAL: IF = 38.9 MHz. Loss in hybrid = 1 dB. NF = NFmeas - Ioss. L = 680 nH. C = 25.9 pF.
Fig.12 Noise figure (NF) measurement in mid and high bands.
2003 Jun 05
22
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
FILTER L A C A C MHBIN1 IFOUT 38.9 MHz (PAL & OFDM) 12 dB attenuator
AM = 30% 2 kHz eu unwanted signal source
HYBRID
HYBRID
D.U.T.
Vo MHBIN2
C
V Vmeas
50
ew
wanted signal source
B
D 50 50
B
D
RMS voltmeter
FCE829
50 Vo = Vmeas x -------------------------------- = Vmeas + attenuation. 2 22 50 + L Wanted output signal at fRFpix; Vo = 100 dBV. Unwanted output signal at fRFpix + 5.5 MHz. The level of unwanted signal is measured by causing 0.09% AM modulation in the wanted signal.
PAL: IF = 38.9 MHz. L = 680 nH. C = 25.9 pF. attenuation = 10.2 dB.
Fig.13 Cross modulation measurement in mid and high bands.
handbook, full pagewidth
50
signal source LBIN IFOUT
L spectrum analyzer C 50
e
Vmeas V
50
Vi
D.U.T.
RMS voltmeter
FCE219
PAL: IF = 38.9 MHz. Zi >> 50 Vi = 2 x Vmeas = Vmeas + 6 dB. L = 680 nH. C = 25.9 pF.
Fig.14 Maximum RF input level without lock-out in low band.
2003 Jun 05
23
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
50
signal source A C
L MHBIN1 IFOUT spectrum analyzer C 50
e
Vmeas V
50
Vi
HYBRID
D.U.T.
MHBIN2
B RMS voltmeter 50
D
FCE220
Loss in hybrid = 1 dB. Vi = Vmeas - loss.
PAL: IF = 38.9 MHz. L = 680 nH. C = 25.9 pF.
Fig.15 Maximum RF input level without lock-out in mid and high bands.
2003 Jun 05
24
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
R5 22 k D1 BB182 R1 12
C3 82 pF L1 6t; 4 mm
C1 1.8 pF C2
LOSCIN
1 (32)
(1) 32
MHBIN2
C17 MHBIN2 4.7 nF C18 MHBIN1 4.7 nF
LOSCOUT
2 (31)
(2) 31
MHBIN1
1.5 pF OSCGND LBIN
C19 LBIN 4.7 nF
3 (30)
(3) 30
R6 22 k D2 BB178 R2 5.6 C11 27 pF
C6 100 pF L2 3t; 2 mm
C4
MOSCOUT
4 (29)
(4) 29
RFGND
1 pF C5 1.5 pF C7 HOSCIN1 IFFIL1 MOSCIN 5 (28) (5) 28 IFFIL2 L4 2x6t 6 (27) (6) 27 C20 12 pF C21 12 pF 7 (26) (7) 26 P2 TP 1 8 (25) (8) 25 AGC R11 1 k C22 160 nF P1 R12 220 P0 R13 470 P3 R14 1 k C13 4.7 nF PLLGND 13 (20) (13) 20 SCL IFOUT 12 (21) (12) 21 AS R16 0 R17 330 R18 330 1/2fref or 1/2fdiv R20 for test purpose only D5 LED D6 LED D7 LED D4 LED
R7 5.6 k D3 BB179
R3 27 L3 3t; 2 mm
1.2 pF C8 HOSCOUT2
1.2 pF C9 HOSCOUT1
R4 5.6 k
1.2 pF C10 1.2 pF C12 4.7 nF VCC HOSCIN2
TDA6500TT (TDA6501TT)
9 (24) (9) 24
10 (23)
(10) 23
for test purpose only IFOUT measurement L5 680 nH C27 22 pF C28 3.9 pF
IFGND
11 (22)
(11) 22
C14 18 pF 4 MHz
XTAL
14 (19)
(14) 19 SDA
TP 2 R21 C23 10 nF 3.9 k R19 18 k C16 820 pF R10 27 k JP2 4 VCC 5V 3 2 GND 1 33 V C15 100 pF
VT
15 (18)
(15) 18
P6/ADC
CP
16 (17)
(16) 17
P4
4.7 k
R15 2.2 k JP1
6 R22 C25 10 F 6.8 k C26 10 F Q1 BC847 JP3 JUMPER SDA
5
4 AS
3
2 5V
1
SCL
GND
n.c.
for test purpose only
VCC
FCE828
The pin numbers in parenthesis represent the TDA6501TT.
Fig.16 Measurement circuit for PAL on test jig.
2003 Jun 05
25
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 12 Component values for measurement circuit COMPONENT VALUE R7 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22
TDA6500TT; TDA6501TT
COMPONENT 5.6 k 27 k 1 k 220 470 1 k 2.2 k 0 330 330 18 k 4.7 k 3.9 k 6.8 k
VALUE
Capacitors (SMD and NP0, unless otherwise stated) C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C25 C26 C27 C28 Resistors; all SMD R1 R2 R3 R4 R5 R6 12 5.6 27 5.6 k 22 k 22 k 1.8 pF (N750) 1.5 pF (N750) 82 pF (N750) 1 pF (N750) 1.5 pF (N750) 100 pF (N750) 1.2 pF (N750) 1.2 pF (N750) 1.2 pF (N750) 1.2 pF (N750) 27 pF (N750) 4.7 nF 4.7 nF 18 pF 100 nF 820 pF 4.7 nF 4.7 nF 4.7 nF 12 pF 12 pF 160 nF 10 nF 10 F (16 V; electrolytic) 10 F (16 V; electrolytic) 22 pF 3.9 pF
Diodes and ICs D1 D2 D3 IC BB182 BB178 BB179 TDA6500TT/TDA6501TT 6 t; 4 mm 3 t; 2 mm 3 t; 2 mm 12 t; coil type: TOKO 7kN; material: 113 kN; screw core: 03-0093; pot core: 04-0026 680 nH
Coils; including IF coil; wire size 0.4 mm L1 L2 L3 L4
L5 Crystal X1 Transistors Q1 LEDs D4 D5 D6 D7
4 MHz
BC847
3 mm 3 mm 3 mm 3 mm
2003 Jun 05
26
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
11 APPLICATION INFORMATION 11.1 Tuning amplifier 11.3
TDA6500TT; TDA6501TT
Examples of I2C-bus sequences
Tables 13 to 18 show various write sequences where: S = START A = acknowledge P = STOP. Conditions: fosc = 100 MHz P0 is on to switch on the low band P3 is on ICP = 280 A fstep = 62.5 kHz N = 1600 fXTAL = 4 MHz IAGC = 245 nA AGC take-over point is set to 112 dBV asymmetrical. For the complete sequence see Table 13 (sequence 1) or Table 14 (sequence 2). Other I2C-bus addresses may be selected by applying an appropriate voltage to the AS input.
The tuning amplifier is capable of driving the varicap voltage without an external transistor. The tuning voltage output must be connected to an external load of 27 k which is connected to the tuning voltage supply rail. The loop filter design depends on the oscillator characteristics and the selected reference frequency. 11.2 Crystal oscillator
The crystal oscillator uses a 4 MHz crystal connected in series with an 18 pF capacitor thereby operating in the series resonance mode. Connecting the crystal to the ground is preferred, but it can also be connected to the supply voltage.
Table 13 Complete sequence 1 START S ADDRESS BYTE C2 A DIVIDER BYTE 1 06 A DIVIDER BYTE 2 40 A CONTROL BYTE CE A BAND SWITCH BYTE 09 A CONTROL BYTE DE A AUXILIARY BYTE 20 A STOP P
Table 14 Complete sequence 2 START S ADDRESS BYTE C2 A CONTROL BYTE DE A AUXILIARY BYTE 20 A CONTROL BYTE CE A BAND SWITCH BYTE 09 A DIVIDER BYTE 1 06 A DIVIDER BYTE 2 40 A STOP P
Table 15 Divider bytes only sequence START S C2 ADDRESS BYTE A 06 DIVIDER BYTE 1 A 40 DIVIDER BYTE 2 A STOP P
Table 16 Control and band switch bytes only sequence START S C2 ADDRESS BYTE A CE CONTROL BYTE A 09 BAND SWITCH BYTE A STOP P
2003 Jun 05
27
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 17 Control and auxiliary bytes only sequence START S C2 ADDRESS BYTE A DE CONTROL BYTE A 20
TDA6500TT; TDA6501TT
AUXILIARY BYTE A P
STOP
Table 18 Control byte only sequence START S C2 ADDRESS BYTE A DE CONTROL BYTE A P STOP
Tables 19 and 20 show read sequences where: S = START A = acknowledge XX = read status byte X = no acknowledge from the master means end of sequence P = STOP. Table 19 Status byte acquisition START S C3 ADDRESS BYTE A XX STATUS BYTE X P STOP
Table 20 Two status bytes acquisition START S C3 ADDRESS BYTE A XX STATUS BYTE 1 A XX STATUS BYTE 2 X P STOP
2003 Jun 05
28
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
12 INTERNAL PIN CONFIGURATION PIN SYMBOL TDA6500TT TDA6501TT LOSCIN LOSCOUT 1 2 32 31
TDA6500TT; TDA6501TT
AVERAGE DC VOLTAGE VERSUS BAND SELECTION LOW 1.7 2.9 1.4 3.5 MID HIGH 1.4 3.5
EQUIVALENT CIRCUIT(1)
2 (31) (32) 1
FCE222
OSCGND MOSCOUT MOSCIN
3 4 5
30 29 28
- 3.5 1.4
- 3.02 1.7
- 3.5 1.4
-
4 (29) (28) 5
FCE223
HOSCIN1 HOSCOUT2 HOSCOUT1 HOSCIN2
6 7 8 9
27 26 25 24
2.2 5 5 2.2
2.2 5 5 2.2
1.8 2.5 2.5 1.8
(27) 6 9 (24) (25) 8 7 (26)
MCE141
VCC IFGND
10 11
23 22
5.0 -
5.0 -
5.0 -
-
11 (22)
FCE225
2003 Jun 05
29
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
PIN SYMBOL TDA6500TT TDA6501TT IFOUT 12 21
TDA6500TT; TDA6501TT
AVERAGE DC VOLTAGE VERSUS BAND SELECTION LOW 2.1 2.1 MID HIGH 2.1
EQUIVALENT CIRCUIT(1)
12 (21)
FCE226
PLLGND
13
20
-
-
-
13 (20)
FCE227
XTAL
14
19
0.7
0.7
0.7
14 (19)
MCE142
VT
15
18
VVT
VVT
VVT
15 (18)
MCE143
CP
16
17
1.0
1.0
1.0
16 (17)
MCE144
P4
17
16
VCE(sat) or High Z
VCE(sat) or High Z
VCE(sat) or High Z
17 (16)
MCE145
2003 Jun 05
30
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
PIN SYMBOL TDA6500TT TDA6501TT P6/ADC 18 15
TDA6500TT; TDA6501TT
AVERAGE DC VOLTAGE VERSUS BAND SELECTION LOW VCE(sat) or High Z MID VCE(sat) or High Z HIGH VCE(sat) or High Z
EQUIVALENT CIRCUIT(1)
(15) 18
MCE146
SDA
19
14
n.a.
n.a.
n.a.
(14) 19
MCE147
SCL
20
13
n.a.
n.a.
n.a.
(13) 20
FCE234
AS
21
12
1.25
1.25
1.25
(12) 21
FCE235
P3
22
11
High Z or VCC - VDS
High Z or VCC - VDS
High Z or VCC - VDS
22 (11)
FCE236
2003 Jun 05
31
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
PIN SYMBOL TDA6500TT TDA6501TT P0 23 10
TDA6500TT; TDA6501TT
AVERAGE DC VOLTAGE VERSUS BAND SELECTION LOW VCC - VDS MID High Z HIGH High Z
EQUIVALENT CIRCUIT(1)
23 (10)
FCE237
P1
24
9
High Z
VCC - VDS
High Z
24 (9)
FCE238
AGC
25
8
0 V or 3.5 V
0 V or 3.5 V
0 V or 3.5 V
25 (8)
FCE239
P2
26
7
High Z or VCC - VDS
High Z or VCC - VDS
High Z or VCC - VDS
26 (7)
FCE240
IFFIL1 IFFIL2
27 28
6 5
4.4 4.4
4.4 4.4
4.4 4.4
27 (6)
28 (5)
FCE241
RFGND
29
4
-
-
-
29 (4)
FCE242
2003 Jun 05
32
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
PIN SYMBOL TDA6500TT TDA6501TT LBIN 30 3
TDA6500TT; TDA6501TT
AVERAGE DC VOLTAGE VERSUS BAND SELECTION LOW 1.8 MID n.a. HIGH n.a.
EQUIVALENT CIRCUIT(1)
(3) 30
FCE243
MHBIN1 MHBIN2
31 32
2 1
n.a. n.a.
1.0 1.0
1.0 1.0
(2) 31 32 (1)
MCE148
Note 1. The pin numbers in parenthesis represent the TDA6501TT.
2003 Jun 05
33
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
13 PACKAGE OUTLINE
TDA6500TT; TDA6501TT
TSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm
SOT487-1
D
E
A
X
c y HE vMA
Z
32
17
A2 A1 pin 1 index Lp L
(A 3)
A
1
e
16
bp wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.85 A3 0.25 bp 0.30 0.19 c 0.20 0.09 D(1) 11.1 10.9 E(2) 6.2 6.0 e 0.65 HE 8.3 7.9 L 1 Lp 0.75 0.50 v 0.2 w 0.1 y 0.1 Z 0.78 0.48 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT487-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
2003 Jun 05
34
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
14 SOLDERING 14.1 Introduction to soldering surface mount packages
TDA6500TT; TDA6501TT
To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: * below 220 C (SnPb process) or below 245 C (Pb-free process) - for all BGA and SSOP-T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages. * below 235 C (SnPb process) or below 260 C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. 14.3 Wave soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.
2003 Jun 05
35
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
14.5
TDA6500TT; TDA6501TT
Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE(1) SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(5), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP Notes
not suitable not suitable(4)
suitable not not recommended(5)(6) recommended(7)
1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. 4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2003 Jun 05
36
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
15 DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development
TDA6500TT; TDA6501TT
DEFINITION This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 16 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 17 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 Jun 05
37
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
18 PURCHASE OF PHILIPS I2C COMPONENTS
TDA6500TT; TDA6501TT
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2003 Jun 05
38
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
NOTES
TDA6500TT; TDA6501TT
2003 Jun 05
39
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753504/01/pp40
Date of release: 2003
Jun 05
Document order number:
9397 750 10109


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